LICENSE.txt
MANIFEST.in
README.md
requirements.txt
setup.py
docs/Makefile
docs/diagram-simple-write.json
docs/diagram-simple-write.png
docs/diagram-write-singlepulse.json
docs/diagram-write-singlepulse.png
docs/diagram-write-swmod.json
docs/diagram-write-swmod.png
example/atxmega_spi_32b.rdl
example/reduced_udp_ipv4.rdl
hectare/_HectareListener.py
hectare/_HectareVhdlGen.py
hectare/__init__.py
hectare/_hectare_types.py
hectare/_vhdl_templates.py
hectare/hectare.py
hectare.egg-info/PKG-INFO
hectare.egg-info/SOURCES.txt
hectare.egg-info/dependency_links.txt
hectare.egg-info/entry_points.txt
hectare.egg-info/requires.txt
hectare.egg-info/top_level.txt
test/00_unit_test/TestHectareVhdlGen.py
test/01_uvvm_simple/hdl/gen_output.sh
test/01_uvvm_simple/hdl/mymodule.rdl
test/01_uvvm_simple/hdl/mymodule.vhd
test/01_uvvm_simple/hdl/mymodule_pkg.vhd
test/01_uvvm_simple/hdl/placeholder.txt
test/01_uvvm_simple/scripts/compile_uvvm.do
test/01_uvvm_simple/scripts/sim.do
test/01_uvvm_simple/tb/mymodule_tb.vhd
test/01_uvvm_simple/tb/mymodule_th.vhd
test/01_uvvm_simple/work/_Alert.txt
test/01_uvvm_simple/work/_Log.txt
test/01_uvvm_simple/work/placeholder.txt
test/02_hdlparse/TestVhdlGenWithHdlparse.py
test/02_hdlparse/rdl_files/generate_docs.py
test/02_hdlparse/rdl_files/sw-r_hw-rw.rdl
test/02_hdlparse/rdl_files/test1.rdl
test/02_hdlparse/rdl_files/test_enum.rdl
test/03_ordt_equivalence/generate.sh
test/03_ordt_equivalence/rdl_files/generate_docs.py
test/03_ordt_equivalence/rdl_files/sw-r_hw-rw.rdl
test/03_ordt_equivalence/rdl_files/test1.rdl
test/03_ordt_equivalence/rdl_files/test_enum.rdl
test/rdl_files/generate_docs.py
test/rdl_files/sw-r_hw-rw.rdl
test/rdl_files/test1.rdl
test/rdl_files/test_enum.rdl